1. Field of the Invention
The present invention relates to an information processing apparatus such as a personal computer, and particularly for an information processing apparatus having a plurality of memory blocks each storing a processing program, for mapping the processing programs in the address space of a central processing unit (CPU) based on either a direct scheme or a bank scheme.
2. Detailed Description of the Background Art
Recently, information processors such as personal computers and word processors are used extensively. Such an information processing apparatus is provided with a ROM-based (ROM: read only memory) program memory for fixedly storing a system program which determines the fundamental operational function of the information processing apparatus. The program memory is generally mapped directly in the CPU address space.
However, for an information processing apparatus which is constrained in its standard memory capacity from the viewpoint of price/performance and the like, when it is intended to set as wide a user-accessible memory space (CPU address space) as possible, the address area assigned to the program memory is restricted, and a complete application program for providing a desired function cannot be stored therein. In such cases, a bank scheme as disclosed in, for example, Japanese Patent Unexamined publication No. 120543/1987 is adopted. In a bank scheme, a program memory is formed of multiple memory blocks, with each memory block being mapped into the same address area in the CPU's address space.
As one example, a case is considered in which the CPU's address space has an optional area for storing an application dependent content in proximity to the program area. In this case, if a user wants to load optional software (program), its program memory area is confined in a predetermined address area since the CPU's address space is fixed. Therefore, in order to store the entire program which exceeds the limited capacity of the program memory area, it must be mapped based on a bank scheme.
On the other hand, if no optional software program needs to be loaded, that area can be used as an extended program memory area, and in this case the program memory area can be acquired through the usual direct mapping scheme instead of the bank scheme.
However, in order for a program, which is conformable to the bank scheme, to process a routine across different memory banks, it needs to switch banks. Due to some differences between the bank scheme and the direct scheme, two types of programs must be prepared. Moreover, the bank scheme, which inevitably includes the bank switching step, is slower in processing speed than the direct scheme.
It is desirable for a processor to have the ability of selecting a mapping scheme depending on whether an application involves loading an optional software program. To this end, current hardware is capable of selecting either direct or bank mapping for the memory blocks of a program memory by using a jumper wire or hardware switch (or memory switch). Information processors with the above-mentioned hardware arrangement have a mapping scheme selected through selective connection by a jumper wire or switch, and have a program memory mounted selectively or replaced from among two kinds of program memories prepared in advance for direct and bank schemes. On this account, switching of mapping schemes necessitates a hardware modification using a jumper wire or switch, as well as replacement of the program memories for the alternation of software. Moreover, because both of these two mapping schemes cannot be accomplished by a single program memory, two types of programs would be required for the two mapping schemes. However, the provision of two kinds of program memories is unfavorable from the viewpoint of working efficiency and maintainability.